Core Research Lab

The core research group studies the interaction of software and modern compute hardware, with an emphasis on improving application performance on multicore systems. The group's work ranges from application architectures, hardware-tuned support libraries, and application performance tuning tools to operating systems support and novel microarchitectures.

An Efficient Software Transactional Memory Using Commit-Time Invalidation [abstract] (PDF)
Justin E. Gottschlich, Manish Vachharajani, and Jeremy G. Siek
To Appear: Proceedings of the 2010 ACM/IEEE International Symposium on Code Generation and Optimization (CGO'10) , April 2010.

Multi-core Acceleration of Chemical Kinetics for Simulation and Prediction [abstract]
John C. Linford, John Michalakes, Manish Vachharajani, and Adrian Sandu
Proceedings of the International Conference on High Performance Computing, Networking, Storage, and Analysis (SC), November 2009.
Accept Rate: 22% (59/261).

A High-performance Low-power Nanophotonic On-chip Network [abstract] (PDF)
Zheng Li, Alan Mickelson, Li Shang, Manish Vachharajani, Dejan Filipovic, Wounjhang Park, and Y. Sun
The ACM Internatioal Symposium on Low Power Electronics and Design (ISLPED), August 2009.

Spectrum: A Hybrid Nanophotonic-electric On-chip Network [abstract]
Zheng Li, Alan Mickelson, Li Shang, Manish Vachharajani, Dejan Filipovic, Wounjhang Park, and Y. Sun
The 46th Annual IEEE Design Automation Conference (DAC), July 2009.
Accept Rate: 21%

An Efficient Lock-Aware Transactional Memory Implementation [abstract] (PDF)
Justin E. Gottschlich, Jeremy G. Siek, Manish Vachharajani, Dwight Y. Winkler, and Daniel A. Connors
Proceedings of the 2009 ACM International Workshop on the Implementation, Compilation, Optimization of Object-Oriented Languages, Programs and Systems (ICOOOLPS). In conjunction with ECOOP. , July 2009.


Home Upcoming and Recent Events October 27, 2008 See Graham D. Price present our work on Visualizing Potential Parallelism in Sequential Programs at PACT-08. August 27, 2008 See Manish Vachharajani and John Michalakes host a Research Round Table on Weather Modeling on GPUs at nvision 2008. April 14, 2008 See John Michalakes present our work on GPU acceleration of numerical weather prediction at LSPP (co-located with IPDPS) February 20-23, 2008 See John Giacomoni present our work on high-speed multicore communication at PPoPP Tuesday, December 3, 2007 See John Giacomoni present our work on high-performance networking at ANCS Publications Active Projects Software Support for Fine-Grain TLP ParaMeter Weather Modeling with GPGPUs Recent Downloads March 17, 2008 New version of CCT (libsmaq) is available for FreeBSD 7.x and Linux is available. February 19, 2008 Initial release of libsmaq available for download Faculty Members Manish Vachharajani Student Members John Giacomoni John Michalakes Graham Price External Links of Interest Computer Engineering Systems Research Lab Dept. of Computer Science Dept. of Electrical & Computer Engineering Computer Architecture Conferences Operating System Conferences OS Design for CMP wiki		The core research group studies the interaction of software and modern compute hardware, with an emphasis on improving application performance on multicore systems. The group's work ranges from application architectures, hardware-tuned support libraries, and application performance tuning tools to operating systems support and novel microarchitectures. Recent Publications An Efficient Software Transactional Memory Using Commit-Time Invalidation [abstract] (PDF) Justin E. Gottschlich, Manish Vachharajani, and Jeremy G. Siek To Appear: Proceedings of the 2010 ACM/IEEE International Symposium on Code Generation and Optimization (CGO'10) , April 2010. Multi-core Acceleration of Chemical Kinetics for Simulation and Prediction [abstract] John C. Linford, John Michalakes, Manish Vachharajani, and Adrian Sandu Proceedings of the International Conference on High Performance Computing, Networking, Storage, and Analysis (SC), November 2009. Accept Rate: 22% (59/261). A High-performance Low-power Nanophotonic On-chip Network [abstract] (PDF) Zheng Li, Alan Mickelson, Li Shang, Manish Vachharajani, Dejan Filipovic, Wounjhang Park, and Y. Sun The ACM Internatioal Symposium on Low Power Electronics and Design (ISLPED), August 2009. Spectrum: A Hybrid Nanophotonic-electric On-chip Network [abstract] Zheng Li, Alan Mickelson, Li Shang, Manish Vachharajani, Dejan Filipovic, Wounjhang Park, and Y. Sun The 46th Annual IEEE Design Automation Conference (DAC), July 2009. Accept Rate: 21% An Efficient Lock-Aware Transactional Memory Implementation [abstract] (PDF) Justin E. Gottschlich, Jeremy G. Siek, Manish Vachharajani, Dwight Y. Winkler, and Daniel A. Connors Proceedings of the 2009 ACM International Workshop on the Implementation, Compilation, Optimization of Object-Oriented Languages, Programs and Systems (ICOOOLPS). In conjunction with ECOOP. , July 2009. All Publications